Formal Lab discipline
Table of Contents:
covering sheet â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦..â¦.Pg.1
Contentsâ¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦..Pg.2
cite of Figures â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦....Pg.3
List of Tablesâ¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦..Pg.4
Objectiveâ¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦.....Pg.5
Equipments and move listâ¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦Pg.5
Theoryâ¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦..Pg.5/6
Procedure: measurement 1â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦.Pg.7
Step 2â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦.Pg.8
Step 3â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦ Pg.9
Step 4â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦Pg.10
destinationâ¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦â¦.Pg.11
Formal Lab Report
List of Figures: FIG: 1.1 For double star Code Compactor
FIG: 7.2 For Controlled Inverter
FIG: 7.3 For Full-adder
FIG: 7.4 For 4-bit Full-adder
FIG: 7.5 For 4-bit cardinals complement subtraction
Formal Lab Report
List of Tables: TRUTH plug-in: 1.
1 For Binary Code Compactor
TRUTH flurry: 1.2 for Controlled Inverter
TRUTH TABLE: 1.3 For Full-adder
TRUTH TABLE: 1.4 For 4-bit Full-adder
TRUTH TABLE: 1.5 For 4-bit twos complement subtraction
Formal Lab Report
OBJECTIVES:
* fashion an XOR based combinational circuits.
* Examine the operations of the XOR gates.
* Construct a full-adder circuit and also test 4-bit adder/subtractor.
* drawing card the truth table for both.
EQUIPMENT AND PARTS LIST:
* +5V DC Supply
* system of logic Probe
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